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DTSTART;VALUE=DATE:20201208
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SUMMARY:(Virtual) RISC-V Summit
DESCRIPTION:  \nThe 3rd annual RISC-V Summit on December 8-10 will highlight the continued rapid expansion of the RISC-V ecosystem\, presenting both commercial offerings and exciting open-source developments. The comprehensive 100% virtual event will feature keynotes from industry pioneers as well as thought-provoking panel discussions. Network with thought-leaders\, technology companies\, and researchers spearheading the adoption of this evolutionary change in the silicon market. To see the complete schedule\, visit the main conference page: https://tmt.knect365.com/risc-v-summit/. \nJoin us for the Keynote Presentation on December 8 at 10 am:  Building an Open Edge Machine Learning Ecosystem with RISC-V\, Zephyr\, TensorFlow Lite Micro and Renode \n\nBy moving closer to the edge\, machine learning is profoundly changing the IoT landscape\, where RISC-V is already seeing immense success. To be able to fully capitalize on the opportunities that arise from this trend\, as well as tackle the related challenges\, various communities must come together to create an open ecosystem of modern tools\, frameworks and platforms that together will constitute a seamless environment for developers to build advanced ML applications on RISC-V. \nThe keynote panel will feature Tim Ansell (Google)\, Kate Stewart (Zephyr Project)\, Brian Faith (QuickLogic) and Michael Gielda (Antmicro) in a discussion of how the strengths of RISC-V\, Zephyr RTOS\, TensorFlow Lite and Renode can be combined to provide collaborative\, software-driven\, traceable ML development for the very edge. The participants will discuss how the vendor-neutral approach of RISC-V resonates with the foundational principles of the Zephyr RTOS and the Renode simulation framework\, and how TensorFlow Lite Micro can leverage the open ISA and its tools to innovate in the ML domain also on the hardware level\, e.g. using FPGAs or custom extensions. The discussion will also touch upon modern testing methodologies and HW-SW co-development enabled by Renode – already employed by Zephyr\, Google’s TF Lite Team and QuickLogic – enabling efficient\, deterministically testable ML development on RISC-V. \n\n \n\nRegister for the conference here.
URL:https://zephyrproject.org/event/virtual-risc-v-summit/
CATEGORIES:Industry Conference
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