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In August 2019, the IBM-initiated OpenPOWER Foundation open sourced the POWER Instruction Set Architecture (ISA), making it a second major open computer architecture after RISC-V. The decision to open the ISA has created an interesting alternative to proprietary solutions in the server room, especially where security and openness are key, as POWER, with its mainline software support and open firmware approach, had been an established solution in data centers for years.
To start building an open ecosystem around this ISA early, IBM immediately followed up the announcement with an open source softcore implementation of POWER: the Microwatt. For its relatively short existence, Microwatt has found its way into many other open source projects, reflecting the community’s excitement with “RISC-V’s older brother”.
At Antmicro we are always looking for opportunities to build bridges between various open source hardware and software communities and projects, so the obvious choice was to implement support for the 64-bit PowerPC (a subset of the POWER ISA) instructions in Renode – our open source, multi-architecture, heterogeneous multi-core capable simulator for software development and software-hardware co-development. Thus, POWER has become the second major open source ISA in Renode’s portfolio after RISC-V. As a result, users are now able to simulate POWER-based nodes in a heterogenous, complex environment using the powerful debugging and testing capabilities of our framework.
Apart from supporting processors based on the POWER architecture, Renode can now also emulate basic peripherals and platform descriptions for Microwatt. To run the Microwatt demo, all you need to do is install Renode for your OS as described in the README, run it and use the following command: start @scripts/single-node/microwatt.resc. The demo contains everything you need, including the sample binary (which you can later exchange for your own using one command). For a full list of demos with “batteries included”, see the “supported boards” section of our documentation.
Although the demo uses a MicroPython binary, Microwatt also has experimental support for the ZephyrRTOS – and since very recently it can run Linux as well! Furthermore, a Chisel version is in the works, leveraging the advantages of the Scala-based HDL framework to simplify and parametrize the code of the POWER core, preparing it to address more scenarios and use cases. It has also recently been integrated with LiteX, an SoC generator we work with and contribute to very frequently – so it’s quickly becoming a part of Antmicro’s standard swiss-army-knife toolset of open tools, IPs, hardware and software for FPGAs.
In the broader context, implementing POWER support in Renode means that developers can now test their applications based on this ISA before running them on actual hardware, experiment with their complete POWER-based SoC implementations before committing to RTL, or co-simulate between ISS and an FPGA or Verilator. IBM’s Microwatt is the first open source implementation of the ISA but the community is now expecting more activity in this area from the OpenPOWER Foundation and more open source CPU releases in the future. Our simulation framework is now ready for those developments and we at Antmicro will be watching this space with a lot of interest as well.
If you’re interested in creating an open FPGA design using the POWER ISA, building a custom POWER based product, or accelerating your workflow with simulation and CI, reach out to us at contact@antmicro.com – we are sure we can help you.