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Zephyr Developer Summit – Day 3 Preview

The first-ever Zephyr Developer Summit  will offer community members a chance to learn more about the fastest growing RTOS in an informal educational environment. The event is free to attend and the last day to register for the event is June 4. Register here: Check out the sessions that will be take place on Thursday, June 10.

Day 3: Mini-Conferences

Common application configuration for boards (Standalone, Bootloader, Chain-Loaded, Secure, Non-Secure) Mini-Conference (Thursday, June 10 at 7am – 9am PDT / 4pm – 6pm CEST) – Jordan Yates, DATA61 / CSIRO 

  • The current Zephyr board abstraction does not well handle different software configurations targeting the same physical hardware. 3 common configurations for any Zephyr board are running a standalone application, a bootloader, and a chain loaded application. Each of these applications can have different requirements for ROM/RAM layouts. Secure and non-secure applications with ARMv8 TrustZone also have differing requirements.
  • Any solution to these problems must be driven by the linker. The discussion is around how to get from a users desire to build an application of type T for board B, to the correct linker memory regions. Ideally any solution is a step towards multi-image builds in the future.

Closing Keynote Panel: Commercializing Firmware Based on the Zephyr RTOS (Thursday, June 10 at 10:30am – 11:30am PDT / 7:30pm – 8:30pm CEST)

  • Panelists:
    • Amy Occhialino (Moderator), Intel 
    • Anas Nashif, Intel
    • Carles Cufi, Nordic Semiconductor 
    • Keith Short, Google
    • Maureen Helm, NXP
    • Mazen Gedeon, Intel
    • Michael Gielda, Antmicro
  • The Zephyr OS provides a very good basis, and the foundation for building products, but it is not a product itself. Taking the Zephyr OS from upstream and making it part of an existing and well-established firmware development environment is a challenge that many users and members of the project face. Challenges include compiler support, integrating into existing IDEs, BSP porting to the Zephyr OS, and using the Zephyr OS’s device model and infrastructure. In this track, we will discuss these challenges and what the Zephyr OS is doing to address them. Additionally, we will discuss the overall benefits of moving to the Zephyr OS for firmware development teams and how the benefits outweigh the challenges, based on firsthand experience from productization companies.

Day 3 User/Ecosystem Track:

  • Coredump: a brief introduction and demo – Daniel Leung, Intel (Thursday, June 10 at 7:00am – 7:30am PDT / 4:00pm – 4:30pm CEST)
    • When fatal error occurs, it is usually preferable to restart the device so that it can continue providing services with minimal downtime. With coredump, it is possible to capture the software states associated with the fatal error, and has the information available for later retrieval and analysis. This presentation provides a brief introduction of the coredump subsystem in Zephyr, and a brief demonstration on how it works.
  • Using CI-based workflow with Renode in bringing TensorFlow Lite to Zephyr – Peter Zierhoffer, Antmicro (Thursday, June 10 at 7:30am – 8:00am PDT / 4:30pm – 5:00pm CEST)
    • With the ever-growing power and capabilities (and variety!) of microcontrollers, TinyML is becoming practical, in turn pushing complexity of MCU software stacks. To address that complexity engineers need versatile and portable tools and workflows, usable across vendors, architectures and use cases. The combination of the Zephyr RTOS, the Renode simulation framework and TensorFlow Lite for Microcontrollers adds up to form a bulletproof open source ecosystem for building advanced ML applications at the edge. 
    • The Zephyr Project provides developers and product makers with a modern, full-featured, customizable open source RTOS for a broad range of resource constrained devices.
    • These edge, often battery-powered devices can now run TinyML workloads thanks to the TensorFlow framework. However, testing software at scale on many small and embedded devices can be a challenge. 
    • Renode, Antmicro’s open source simulation framework, enables bringing these two worlds together. Allowing for hardware-less, Continuous Integration-driven workflows on embedded devices and IoT systems, Renode helped us run TensorFlow on Zephyr-supported hardware.
    • In a recent collaboration with Google, Antmicro brought Renode’s capability of full SoC simulation to the TensorFlow Lite CI and enabled a variety of demos and flows to be run by users without access to hardware. Renode can test Zephyr + TF Lite Micro integration using the complete flow, as perceived by users – providing data to sensors connected to different busses and observing the results on output interfaces, using the same binaries they’d run on hardware. This paved the way for further porting of TFLite to new platforms, adding a powerful new use case to the Zephyr portfolio and becoming a ready-to-use base for both internal and academic research. 
    • The presentation will cover the process of the integration, describe the dedicated testing infrastructure and showcase practical application of the project.
  • Using Zephyr RTOS in an end-to-end IPv6 IoT solution – Jan Geldmacher and Christian Taedcke, Lemonbeat GmbH (Thursday, June 10 at 8:00am – 8:30am PDT / 5:00pm – 5:30pm CEST)
    • Lemonbeat offers IoT connectivity solutions consisting of field devices, gateways, and a backend system using end-to-end IPv6. Based on the use case requirements we have to be flexible and  support different types of connectivity between field device and gateway. 
    • This includes wireless connection via long or short range radio, wired connection via ethernet, and cellular connectivity (LTE cat-M1 or LTE cat-NB1). Zephyr enabled us to build a highly flexible software for our devices which seamlessly integrates our IPv6 based application layer with the underlying varying communication layers. In this talk we will show some of our use cases and explain how we used Zephyr RTOS to implement device and gateway firmwares. Additionally the talk covers some of the contributions we made to the Zephyr project (mostly related to IPv6 routing and PPP support). Finally we will explain challenges and learnings we experienced when moving from a legacy stack to Zephyr based solution.
  • Taking Zephyr RTOS to the Virtual Edge – Rob Woolley, Wind River (Thursday, June 10 at 8:30am – 9:00am PDT / 5:30pm – 6:00pm CEST)
    • New edge computing architectures are using virtualization to partition the system into different functional domains.  These use cases also have a requirement for real-time and safety-critical applications that can’t be met by Linux.  We will demonstrate how Zephyr RTOS may be used in these new designs by adding support for virtual I/O.
  • Best Practices for Debugging Connected Applications running Zephyr – Chris Coleman, Memfault and Luka Mustafa, IRNAS (Thursday, June 10 at 9:30am – 10:30am PDT / 6:30pm – 7:30pm CEST)
    • Zephyr comes with a lot of built-in capabilities that, of course, provide a lot of value but can make it challenging to find the most efficient ways to debug issues quickly. In this talk, we will walk through configuration options and settings that can be used to investigate connectivity issues and faults when working with Zephyr. We will present how to use external tools like Memfault to speed up this process and fix these problems remotely. Finally, we will walk through some real-world examples of how IRNAS debugs their Zephyr devices in production.

Day 3 Contributor Track:

  • Integrating RISC-V PMP Support in Zephyr – Kevin Hilman, Baylibre (Thursday, June 10 at 7:00am – 8:00am PDT / 4:00pm – 5:00pm CEST)
    • RISC-V architecture has a hardware feature named PMP (Physical Memory Protection). Integrating PMP in Zephyr was key to enable the support of userspace (with shared memory) and stack guard features.
    • The purpose of this presentation is to describe all the work that has been done, providing more details on the challenges and key decisions/choices that had to be taken.
  • Energy-Efficient Zephyr Device Testing System – Chris Vondrachek, Intel (Thursday, June 10 at 8:00am – 9:00am PDT / 5:00pm – 6:00pm CEST)
    • Design of a scalable & powered on-demand Zephyr device testing system using off-the-shelf & open-source ingredients. Demonstrates deploying Zephyr test agents as network-booted Linux PCs with Zephyr SDK container + Gitlab CI or Github Actions runner. Includes examples on test-pattern generation & I/O using BeagleBone & Zephyr on FPGA SoC. Demonstrates improving test system performance & reliability while also decreasing energy consumption.
  • Developing Hardware for Zephyr – Jared Wolff, Circuit Dojo LLC (Thursday, June 10 at 9:30am – 10:00am PDT / 6:30pm – 7:00pm CEST)
    • Learn about some of the biggest takeaways from the development of the Nordic Semiconductor based nRF9160 Feather.

Maemalynn Meanor

Senior PR Manager